大聯(lián)大友尚集團(tuán)推出基于Invensense技術(shù)的智能手機(jī)OIS模塊解決方案

21i訊，近日，大聯(lián)大控股宣布，大聯(lián)大友尚集團(tuán)旗下富威推出基于Invensense IDG-2030(U)的智能手機(jī)OIS模塊解決方案。Invensense IDG-2030(U)為最新一代二軸陀螺儀器件，是專(zhuān)門(mén)為了滿(mǎn)足智能手機(jī)對(duì)拍照需求而設(shè)計(jì)的，其可提供光學(xué)防抖功能并增加照片清晰度。

手機(jī)相機(jī)模塊已成為現(xiàn)在手機(jī)必備的功能之一，且已演變到超越5 Mega Pixel(MP)的高分辨率與高影像質(zhì)量，未來(lái)將向超過(guò)8MP的更高質(zhì)量發(fā)展。對(duì)高分辨率的青睞，延伸出市場(chǎng)對(duì)光學(xué)防手抖功能的需求，以防止低光線下的手抖(hand jitter)與各種光線下的攝影抖動(dòng)(video jitter)所導(dǎo)致影像扭曲的現(xiàn)象產(chǎn)生。相機(jī)模塊整合與執(zhí)行器微定位技術(shù)(actuator technology)的發(fā)展，搭配Invensense小尺寸、高效能的陀螺儀，讓移動(dòng)便攜設(shè)備上的相機(jī)模塊能夠直接擁有OIS功能，提供不輸DSC的影像質(zhì)量。

圖示1-大聯(lián)大友尚集團(tuán)旗下富威代理的Invensense IDG-2030(U)的產(chǎn)品照片

大聯(lián)大友尚集團(tuán)旗下富威代理的Invensense的IDG-2030(U)為目前市場(chǎng)的最小尺寸(2.3*2.3*0.65)，可整合至最薄、最緊湊的模塊中，并支持超音波水洗, 大大提高模塊廠良率，是最適合整合至未來(lái)智能手機(jī)內(nèi)的產(chǎn)品。Invensense單一結(jié)構(gòu)陀螺儀設(shè)計(jì)，含單一驅(qū)動(dòng)頻率(single drive frequency)、高敏感度、高軸間隔絕、低相位延遲、低噪聲、迅速的20MHz SPI接口，使Invensense的解決方案，可滿(mǎn)足目前與下一代智能手機(jī)相機(jī)模塊對(duì)OIS的需求。

圖示2-大聯(lián)大友尚集團(tuán)旗下富威代理的Invensense IDG-2030(U)的應(yīng)用框圖

產(chǎn)品應(yīng)用

• Optical Image Stabilization for Digital Still Camera and Video Cameras

• Electronic Image Stabilization for video jitter compensation

產(chǎn)品特性

1. Sensors

• Monolithic angular rate sensor (gyros) integrated circuit

• Available in XY (IDG-2030) versions

• Digital-output temperature sensor

• External sync signal connected to the FSYNC pin supports image, video and GPS synchronization

• Factory calibrated scale factor

• High cross-axis isolation via proprietary MEMS design

• 10,000g shock tolerant

2. Digital Output

• Fast Mode (400kHz) I2C serial interface

• 1 MHz SPI serial interface for full read/write capability

• 20 MHz SPI to read gyro sensor & temp sensor data

• 16-bit ADCs for digitizing sensor outputs

• User-programmable full-scale-range of ±31.25°/sec, ±62.5°/sec, ±125°/sec and ±250°/sec

3. Data Processing

• The total data set obtained by the device includes gyroscope data, temperature data, and the one bit external sync signal connected to the FSYNC pin

• FIFO allows burst read, reduces serial bus traffic and saves power on the system processor

• FIFO can be accessed through both I2C and SPI interfaces

• Programmable interrupt

• Programmable low-pass filters

4. Clocking

• On-chip timing generator clock frequency ±1% drift over full temperature range

5. Power

• VDD supply voltage range of 1.71V to 3.6V

• Flexible VDDIO reference voltage allows for multiple I2C and SPI interface voltage levels

• Power consumption for two axes active: 2.9mA

• Sleep mode: 5μA

• Each axis can be individually powered down

6. Package

• 2.3x2.3x0.65mm footprint and maximum thickness 16-pin QFN plastic package

• MEMS structure hermetically sealed at wafer level

• RoHS and Green compliant