隨著工藝節(jié)點(diǎn)下降到65nm以后，傳統(tǒng)的NLDM model不再精確，Synopsys提出了基于電流源模型的Composite Current Source(CCS)，集timing/power/noise于一體，精確度更高，與SPICE的誤差可以達(dá)到±2%。

什么是Timing Model

數(shù)字芯片設(shè)計(jì)，除了礦機(jī)的全定制設(shè)計(jì)外，絕大部分都是基于STD Cell的半定制設(shè)計(jì)，那么STD Cell的模型就極為重要，尤其半定制，需要把一個(gè)std cell看成block box，只考慮其input/output pin。其input pin對(duì)外部是receiver，output pin對(duì)外部是driver。因此，對(duì)receiver/driver建立精確模型十分重要。

Timing model包含driver model、net model、receiver model三個(gè)部分，Driver model和receiver models通常通過(guò)電路仿真工具K庫(kù)的, 而net model要么是根據(jù)wire-load、manhattan、star topology評(píng)估的，要么是從版圖根據(jù)metal、via、contact等的寄生參數(shù)來(lái)提取的。

什么是NLDM？

即(Non-Linear Delay Model)非線性延遲模型。

先看看看老外的描述：https://www.paripath.com/blog/characterization-blog/comparing-nldm-and-ccs-delay-models

NLDM Driver Model

NLDM driver model characterizes input-to-output delay and output transition times with sensitivity to input transition time, output load and side input states. These characteristics are obtained using a circuit simulator with appropriate stimulus to cause output transition. Input stimulus along with input/output measurement/capture points are shown in the picture below.

As seen in the picture, characterization software like guna measure and captures 3 points on sides of active input and active output. These three points are called delay and transition time thresholds. Difference between input delay threshold and output delay threshold is modeled as cell delay and difference between lower and upper transition times on output port is modeled as output transition time. These two parameters - delay and transition times are used to synthesize NLDM driver model shown in the picture below:

NLDM Receiver Model

NLDM receiver model is simply a single capacitor for the entire transition with no sensitivity.

Shortcomings of NLDM model

NLDM only captures 3 output points, which is not sufficient to reflect non-linearities of circuits at lower geometries (65nm and below) in synthesized driver model during static timing analysis. Classical case of this insufficiency is when driver resistance is order of magnitude less than the impedance of net it is driving (Rd << Znet). Driver model requires more granularity in driver model. CCS timing model eliminate need for this synthesis and hence is able to achieve higher accuracy than NLDM.

Other significant shortcoming of NLDM is in the receiver model. NLDM receiver model fails capture miller effect. This effects dominates delay calculation of STA for very small impedance nets.

也就是說(shuō)，NLDM模型有如下缺點(diǎn)

• 僅通過(guò)3個(gè)輸出點(diǎn)來(lái)評(píng)估延時(shí)，線性度不夠精確；

• NLDM的driver model是個(gè)內(nèi)阻恒定的電壓源，即輸出電壓是時(shí)間的線性函數(shù)V(t)，當(dāng)65nm節(jié)點(diǎn)以下時(shí)，驅(qū)動(dòng)線網(wǎng)的電阻將大得可觀，模型會(huì)失真。

• NLDM的receiver model是單一的input cap，不能捕獲Miller效應(yīng)，對(duì)于很小的阻抗網(wǎng)絡(luò)，Miller效應(yīng)決定了延遲。

NLDM用input transition、output capacitance這兩參數(shù)來(lái)查表、插值計(jì)算得到Cell delay延時(shí)及Output transition。

查找表timing部分共四個(gè)輸出，前兩個(gè)分別表示輸出上升沿和輸出下降沿的delay值，后兩個(gè)分別表示輸出上升沿和輸出下降沿的transition time。輸出的transition time則是下一級(jí)器件的input transition time。

看看NLDM查表、插值計(jì)算過(guò)程：

將input transition和output capacitance這兩個(gè)參數(shù)代入到std cell庫(kù)中的delay lookup table，查找X 和Y左右兩側(cè)的坐標(biāo)，將這四個(gè)坐標(biāo)點(diǎn)代入二元擬合公式Z=A B*X C*Y D*X*Y，就可以得到四個(gè)二元二次方程，由這四個(gè)方程可以解出 ABCD 四個(gè)系數(shù)的值，這樣就得到了一個(gè)具體的擬合公式，然后再將input transition和output capacitance代入擬合公式就可以計(jì)算出這個(gè)cell的delay值了。

什么是CCS？

即（Composite Current Source）復(fù)合電流源模型。

同樣，先看看老外的描述：

CCS Driver Model

CCS driver model is characterized by capturing current waveform flowing into the load capacitor of the cell. CCS driver model also has sensitivity to input transition time, output load and side input states. CCS driver model is essentially a current source with infinite driver resistance, hence it provides better accuracy in cases where net impedance is very very high. Note, CCS timing model does not require synthesis of driver model, captured current waveform is driver model itself.

CCS Receiver Model

CCS receiver model is characterized much like NLDM receiver model with additional granularity to reflect sensitivities like miller capacitance, state of side inputs, input transition times and output load. To accurately reflect effect of miller capacitance on input capacitance and net-delay, it is divided into two parts - C1 and C2. For STA delay calculation, C1 is used in net delay calculation before receiver waveform hits delay threshold point and C2 is used in net delay calculation after receiver waveform hits delay threshold point.

也就是說(shuō)，

CCS driver model是一個(gè)非線性復(fù)合電流源，電流隨電壓和時(shí)間而變化I(t,V)，即一個(gè)具有無(wú)限驅(qū)動(dòng)阻抗的電流源。

CCS receiver model為了更準(zhǔn)確反映米勒電容，將輸入電容分為C1和C2兩個(gè)部分。C1用于接收波形到達(dá)延遲閾值前的net delay計(jì)算，C2用于接收波形到達(dá)延遲閾值后的net delay計(jì)算。

比如input pin的transition范圍是30%到70%，那么(30%,50%)這段時(shí)間的cap值為C1，(50%,70%)這段時(shí)間的cap值為C2。

除了CCS模型，還有ECSM等模型，不再贅述。CCS、ECSM模型的數(shù)據(jù)量都大于NLDM。

典型的CCS庫(kù)大約比NLDM大8-10倍。

為了提供準(zhǔn)確的電流矢量模型，CCS會(huì)存儲(chǔ)波形，且每個(gè)波形存儲(chǔ)10個(gè)電流值和10個(gè)時(shí)間值，共20個(gè)數(shù)字。

CCS對(duì)于每個(gè)輸入轉(zhuǎn)換和輸出負(fù)載有20個(gè)數(shù)字，NLDM對(duì)于每個(gè)輸入轉(zhuǎn)換和輸出負(fù)載存儲(chǔ)2個(gè)數(shù)字。因此，與NLDM模型相比，CCS模型大小將增加10倍。

CCS lib/db里，可以同時(shí)含timing/power/noise信息。CCS lib里會(huì)看到有ccsn_first_stage/ccsn_last_stage group，分別是最前/后級(jí)管子受noise的影響。

參考文獻(xiàn)：

《compare of CCS ?and ?NLDM》；https://www.paripath.com/blog/characterization-blog/comparing-nldm-and-ccs-delay-models，作者：paripath Inc.

STA概念：一文了解NLDM與CCS；

https://blog.csdn.net/graymount/article/details/106010388?utm_medium=distribute.pc_aggpage_search_result.none-task-blog-2~aggregatepage~first_rank_ecpm_v1~rank_aggregation-1-106010388.pc_agg_rank_aggregation