基于IR3521設(shè)計(jì)的AMD SVID電源技術(shù)
The IR3521 Control IC combined with an xPHASE3TM Phase IC provides a full featured and flexible way to implement a complete AMD SVID power solution. It provides outputs for both the VDD core and VDDNB auxiliary planes required by the CPU. The IR3521 provides overall system control and interfaces with any number of Phase ICs each driving and monitoring a single phase. The xPHASE3TM architecture results in a power supply that is smaller, less expensive, and easier to design while providing higher efficiency than conventional approaches.
IR3521主要特性:
2 converter outputs for the AMD processor VDD core and VDDNB auxiliary planes
Supports High Speed (HS) I2C Serial communications
PSI_L serial commands are communicated to a programmable number of phase ICs
0.5% overall system set point accuracy
High speed error amplifiers with wide bandwidth of 20MHz and fast slew rate of 10V/us
Remote sense amplifiers provide differential sensing and require less than 50uA bias current
Programmable Dynamic VID Slew Rates
Programmable VID Offset (VDD output only)
Programmable output impedance (VDD output only)
Programmable Dynamic OC for IDD_Spike
Programmable per phase switching frequency of 250kHz to 1.5MHz
Hiccup over current protection with delay during normal operation
Central over voltage detection and communication to phase ICs through IIN (ISHARE) pin
OVP disabled during dynamic VID down to prevent false triggering
Over voltage signal to system with over voltage detection during powerup and normal operation
Detection and protection of open remote sense lines
Gate Drive and IC bias linear regulator control with programmable output voltage and UVLO
Small thermally enhanced 32L MLPQ (5mm x 5mm) package
圖1.IR3521方框圖
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圖2.IR3521 PWM方框圖
圖3.IR3521 應(yīng)用電路圖
圖4.IR3521 輸出1系統(tǒng)測(cè)試點(diǎn)測(cè)試電路圖
圖5.IR3521 輸出2系統(tǒng)測(cè)試點(diǎn)測(cè)試電路圖
圖6.IR3521/IR3507 5相-1相雙輸出AMD SVID轉(zhuǎn)換器電路圖