臺積電采用GSS統(tǒng)計分析工具 提供精確設(shè)計分析思路

臺積電采用GSS統(tǒng)計分析工具 提供精確設(shè)計分析思路0' title='臺積電采用GSS統(tǒng)計分析工具 提供精確設(shè)計分析思路0' />

元器件交易網(wǎng)訊 11月13日消息，據(jù)外媒 Electronicsweekly報道，臺積電宣布將采用Gold Standard Simulations(GSS)公司的統(tǒng)計分析工具，Gold Standard Simulations公司由格拉斯哥大學電氣工程專業(yè)教授Asen Asenov創(chuàng)立。臺積電此舉標志著Gold Standard Simulations公司拿到無生產(chǎn)線晶圓制造領(lǐng)域的敲門磚。

Asen Asenov教授稱：“我們首先需要做的是讓無生產(chǎn)線晶圓制造廠接受這項技術(shù)，如若不然，制造廠商們也是無法接受的。如今，臺積電采用了統(tǒng)計分析工具，我們可預見未來將會有更多無生產(chǎn)線晶圓制造廠商會采用它。”

GSS今年收獲了一個豐收年。GSS統(tǒng)計分析工具是一款高級統(tǒng)計緊湊模型提取工具，可用以預測未來的設(shè)備性能和產(chǎn)量；可為臺積電提供TCAD設(shè)備統(tǒng)計提取服務(wù)，同時另有一家不知名大公司同樣采用了此款統(tǒng)計分析工具。

Asen Asenov教授表示：“明年，我們會更好！力爭達到400萬億美元營收。GSS網(wǎng)站上大家都在熱議關(guān)于英特爾 22 nm finfet制程技術(shù)，這加速催化了我們的訂單；與此同時，此熱議也為我們網(wǎng)站招致來每天數(shù)以千計的瀏覽數(shù)。”

GSS統(tǒng)計分析工具是一種先進的緊湊模型提取工具，是先進IC設(shè)計的必備工具，特別是在28 nm制程技術(shù)節(jié)點和鏈接方面，它有助于減少設(shè)計的悲觀情緒和促進高西格瑪產(chǎn)量分析和優(yōu)化。同時它也能精確抓取先進設(shè)備數(shù)據(jù)用于精確設(shè)計分析，是CMOS集成電路設(shè)計中IC制造與技術(shù)之間必不可少的橋梁。(元器件交易網(wǎng)龍燕 譯)

外媒原文：

TSMC is to use the statistical analysis tools of Gold Standard Simulations (GSS) founded and headed up by Professor Asen Asenov, professor of electrical engineering at Glasgow University.Adoption by TSMC is key to getting GSS’ technology accepted by the fabless community.

“The first thing was to get foundries to accept this technology,” Asenov tells Electronics Weekly, “ if the foundries don’t accept this then it’s difficult to get fabless companies to accept it. By having TSMC adopting this statistical abstraction technology we see significant reasons for fabless companies to adopt this technology too.”

GSS has had a good year. Besides the sale of its Mystic advanced statistical compact model extraction tool for TCAD device analysis to TSMC it has also had a sale to a large, unnamed semiconductor manufacturer. Sales this year will hit $1.3 million.

“Next year we’re aiming for $4 millioin,” says Asenov.

The catalyst for orders was a series of blogs on the GSS web-site about Intel’s 22nm finfet process. “Our blogs on Intel’s finfet technology resulted in people hitting on our web page in thousands a day,” says Asenov.

One of the capabilities of GSS’ statistical simulation tool is its ability to predict the performance and yield of future devices.

“People have been dealing with variability by putting extra margin in the design and this sacrifices performance in the silicon,” says Asenov, “technology has reached the stage where you can gain competitive advantage if you design better. At 28nm to get differentiation you need to do better design.”

“Statistical compact model extraction is an imperative in advanced IC design, particularly at the 28nm technology node and below, where it helps to reduce design pessimism and facilitates high-sigma yield analysis and optimization,” adds Asenov.

Everyone is looking for very high accuracy. The techniques for the GSS tools were based on tools developed by the financial industry to estimate yields from complicated financial instruments which can do very accurate analysis.

Mystic is an advanced compact model extraction tool, which has been specifically designed for accurate statistical compact model extraction. It provides a powerful yet flexible scripted environment that enables the development of robust yet accurate compact model extraction strategies for advanced devices based on data from TCAD simulations or silicon measurement.

Compact models are an essential bridge between IC manufacturing technology and IC design for CMOS devices, and must accurately capture the behaviour of advanced devices in order to enable accurate ‘right first time’ design.

Mystic simplifies the creation of the large, complex statistical compact model libraries required to manage the interplay between process-induced and purely statistical variability in advanced CMOS technologies.

The complex strategies and fitting algorithms needed to extract contemporary compact models require highly flexible extraction software. By utilising multiple back end simulators and GSS cluster computing and database technology, Mystic can tailor and customize statistical model extraction strategies for maximum accuracy in a highly application-specific environment.

Mystic is fully integrated with both GSS’ GARAND TCAD simulation tools and the RandomSPICE statistical circuit simulation engine. Fabless companies can adopt Mystic in their design flow.[!--empirenews.page--]

Asenov is a bit of a fan of ST’s FD-SOI technology. “At 14nm FD-SOI is much cheaper, 30-40% cheaper, than Intel’s technology,” says Asenov.

The problem for FD-SOI is getting an ecosystem together which will make it viable for users.

Asenov is on the board of Yorkshire IP developer SureCore which develops SRAM for FD-SOI.